2009 Product Change Notification (PCN)

(From): Products assembled in the SC70 package using the currently qualified mold compounds shown below. (To): Products assembled in the SC70 package using the new alternative mold compounds shown below.

(From): Zener Iz Current Condition Change from 5mA (To): Zener Iz Current Condition Change from 2mA

From): Products assembled in the 8-, 16-, and 28-lead SOIC packages assembly at Amkor Technologies - Philippines (ATP) using EME-6300H or EME-6600H mold compound as shown in table 1. (To): Products assembled in the 8-, 16-, and 28-lead SOIC packages assembly at ATP using EME-G600 low halogen mold compound as shown in table 2.

(From): 1.0 Unit Qty per Box: A. For Straight Leads: 1000 pcs per intermediate box and 8000 pcs per shipping box B. For Formed Leads: 1000 pcs per intermediate box and 6000 pcs per shipping box 2.0 Box Dimensions: A. Intermediate Box 570x150x47mm for straight leads. 570x150x62mm for formed leads. B. Shipping Box: 580x325x215mm for both straight and formed leads (To): 1.0 Unit Qty per Box: 800pcs per intermediate box and 3200 pcs per shipping box for both straight and formed leads. 2.0 Box Dimensions: A. Intermediate Box 560x143x51.5mm for both straight and formed leads. B. Shipping Box: 590x315x215mm for both straight and formed leads

(From): Selected devices that are currently tested and packed in Amkor Technologies, Inc., Taiwan are back laminated. Back laminate is a polyester tape applied to the back of the units to minimize package chips during saw dicing. (To): The selected devices will be manufactured without back laminates. Overall dimensions of the package will remain unchanged. The package chipping specification for non-laminated device will remain the same as back laminated device. Units? marking contrast maybe affected and adjustment to the mark vision system?s parameter on the mounter maybe required when changing from back laminated units to non-back laminated units. Existing warehouse inventories with back laminate will continue to be shipped until the inventories have been exhausted. Fairchild will then inform affected customers on the phasing in of non-laminated products. Fairchild will control the shipment of devices to ensure no mixing of back laminated and non-laminated products within a shipment.

(From): 4inch diameter, Bucheon, Korea 82-3, Dodang Dong, Wonmi Ku, Kyeonggy Do, Korea (To): 5inch diameter, Bucheon, Korea 82-3, Dodang Dong, Wonmi Ku, Kyeonggy Do, Korea

(From): KSC5502DTM is currently manufactured at SP Semiconductor & Communication Co Ltd. located in Korea with package outline dimensions that do not fully conform to the JEDEC requirement. (To): KSC5502DTM will be manufactured at Fairchild Semiconductor located in Suzhou, China with package outline dimensions that will conform to JEDEC requirement.

(From): The current width of the scribe line is 120 um (To): The new width of the scribe line is 90 um. This change does not affect the balls spacing or position, and the products will fit in the same land pattern indicated in the data sheet. If required, the pocket size of the tape and reel are reduced to insure the smaller die will not rotate inside the pocket

(From): Selected Intellimax products currently manufactured using the 6-inch line at Fairchild Semiconductor, South Portland, Maine. The affected products currently have their bumping done at Unitive Electronics Inc., North Carolina and are manufactured with backmetal at Fairchild Semiconductor in Cebu, Philippines. (To): Selected Intellimax products will also be manufactured using the 8-inch line at Fairchild Semiconductor, South Portland, Maine. The affected devices will have their bumping done at Amkor Technology, Inc. Korea or at Fairchild Semiconductor, South Portland, Maine, and manufacturing will be done with no backmetal at Fairchild Semiconductor in Penang, Malaysia.

From): The current exposed dap width dimension is 1.10mm. (To): The new exposed dap width dimension will be changed to 0.85mm.

From): Standard Discrete products fabricated by Tianjin wafer foundry. (To): Standard Discrete products fabricated by Li-Je wafer foundry

This notification is for your information only

(From): The current die attach method is Wafer Backside Lamination (WBL) die attach isolation. The current assembly and testing is located at Subcon ASE (Advanced Semiconductor Engineering Inc.). (To): The die attach method will be changed to Polyimide tape die attach isolation. The assembly and test will be transferred to Fairchild Semiconductor, located in Cebu Philippines.

(From): Fairchild products currently manufactured using Fairchild's 6-inch class 1, fab process in South Portland, ME. (To): Products will now be produced on both 6 inch and 8 inch wafer Diameters. Manufacturing will occur in the same 6-inch Class-1 fab currently producing these products. In some cases, new 8 inch equipment will be added to accommodate the 6 to 8 inch processing conversion. Die size, design, geometry, or layout of the affected products remains un-changed. 8 inch products will be fully compliant to all published data sheet specifications and will be completely interchangeable with current 6-inch product. Quality and reliability will remain at the highest standards already demonstrated with Fairchild's existing products.

(From): Datasheet changes to Idd max, td2 max, tRise max, tFall max as listed below. (To): Datasheet changes to Idd max, td2 max, tRise max, tFall max as listed below.

(From): Select products assembled in the 8-lead TSSOP package at Plant 1 of UTAC Thai Limited (UTL) in the Bangna sub-district of Bangkok, Thailand. (To): Select products assembled in the 8-lead TSSOP package at Plant 2 of UTAC Thai Limited (UTL) in Wellgrow, Thailand (in Chachoengsao province).

(From): 1) KTMC5400LK mold compound 2) Direct Bonded Copper (DBC) supplier (Curamic) 3) Leadframe raw material supplier (KFC) Description of Change (To): 1) SI7200DT mold compound 2) Direct Bonded Copper (DBC)supplier (KCC) 3) Leadframe raw material supplier (PMC90)

(From): Datasheet changes to Idd max, td1 max, td2, tRise max, tFall max as listed below (To): Datasheet changes to Idd max, td1 max, td2, tRise max, tFall max as listed below

(From): Selected MOSFET products assembled in Power 56 package, in which the current Die Attach Pad & Leadpost plating is NiPdAu; current Gate Leadpost Plating is NiPdAu; current Gate Interconnect is 5mil Al wire; current Singulation Method is Saw-Singulation and current Plating Finish is NiPdAu. To view "From/To" Dimensional Outline, please refer to the attached table "Dimensional Outline." (To): The alternate Die Attach Pad & Leadpost plating will be Bare Cu; alternate Gate Leadpost Plating will be Ag; alternate Gate Interconnect will be 2mil Cu wire; alternate Singulation Method will be Punch-singulation and the alternate Plating Finish will be Pure Sn.

(From): Minimum test specification of Fall Time of Output Current (Tf) from Min = 2.0 us. (To): Minimum test specification of Fall Time of Output Current (Tf) to Min = 1.5 us.

(From): Lite-on Shanghai as the manufacturing site for surface mount Schottky devices. (To): Taiwan Semiconductor and Panjit Electronics as additional manufacturing sites for surface mount Schottky devices.

(From): TSSOP 16/28/64L and PDIP 8/16/20/24L packages assembly at Amkor Technologies - Philippines (ATP) using EME 7050B, EME 7351T and EME 6300H mold compound as shown in table 1. (To): TSSOP 16/28/64L and PDIP 8/16/20/24L packages assembly at ATP using EME G700K and EME G600C low-halogen mold compounds as shown in table 2.

(From): 8um/40V fab process in Bucheon, Korea (To): 1.5um/40V fab process in Bucheon, Korea. Functionality and electrical characterics remain within current datasheet specifications.

(From): The material composition of lead frame is bare copper with full Ni-plating; Mold epoxy compound is EME6600CS. (To): The material composition of lead frame is bare copper without any plating; Mold epoxy compound change to SI7200DX2. (refer to below detail comparison)

(From): Current VZ Datasheet Limits (To): Industry Standard VZ Datasheet Limits

(From): 1) Use of 2.0mil Au wire. Description of Change (To): 1) Use of 2.0mil Cu wire.

(From): Affected FSIDs released with EMC: KTMC1030NFE and SL-7300HXM. (To): Affected FSIDs released with EMC: SI-7200DX2.

(From): Wire changed for MLP 6x6 package from Au-wire. (To): Wire changed for MLP 6x6 package to Cu-wire.

Packing Material Dimensions (Rails/Boxes) (From): Packing box with old dimension (To): Packing box with new dimension

(From): 1) Fairchild products currently manufactured using Fairchild's 150mm class 1 fab process in South Portland, Maine. 2) The 42-ball BGA package currently using RoHS compliant Bill of Materials(BOM). (To): 1) Products will now be produced on 200mm wafers at the Fairchild Semiconductor South Portland, Maine fab. 2) The 42-ball BGA package in addition to being RoHS compliant is now fully green compliant. Die size, design, geometry and layout of the affected products remains unchanged. The products will be fully compliant to all published datasheet specifications. Quality and reliability will remain at the highest standards already demonstrated with Fairchild's existing products.

(From): Optoelectronics detector devices utilized in the assembly of the attached affected products are currently fabricated at China Resources (CRS) 4 inch fabrication facility located in Hong Kong, China. (To): Optoelectronics detector devices utilized in the assembly of the attached affected products will be fabricated at CRS 6 inch fabrication facility located in Wuxi, China. There will be no detector device, design, die size or die thickness changes for the affected FSID's. Product assembled with detector die manufactured at Wuxi facility will be fully compliant to all publish databook specifications and will be interchangeable with products manufactured at the existing wafer fab location. Quality and reliability will remain at the highest levels already demonstrated with Fairchild existing products.

From): TO3PF 3 Leads MOSFET products are currently manufactured at SP Semiconductor & Communication Co Ltd. and Enoch located in Korea using materials referenced in below table. (To): TO3PF 3 leads MOSFET products will be manufactured at Fairchild Semiconductor located in Suzhou, China using materials referenced in below table. Changes in soft solder die attach material and leadframe base material which have been made to align with standard materials and process currently utilized in FSC, Suzhou Manufaturing line. Package outline drawing of the affected products remains un-changed.